iDRM (integrated Design Rule Manager)

iDRM is a design rule compiler technology that offers the following unique capabilities:

Capture design rules: Using the graphical Design Rule Editor, you draw the layout topology that describes the design rule. Drawing is quick, simple and intuitive and can start from scratch or jumpstarted by clipping a snippet from existing layout. You can then add arrows marking proximities and distances between shapes, edges or corners, and assign variable names to them. e.g. spacing, width, poly-pitch, etc.

Tip to line space rule drawn in iDRM

You can write logical expressions and conditions, using these variables, to express statements that further qualify the drawn topologies. For example in a tip to line rule you can set a condition that this specific rule only applies if tip_width <= 100nm and for all such cases define a rule that the space should be bigger than 80nm. (see above image)

The design rule is now captured and it is formal and clear.

Executable Expression: (here comes the magic part!)

Once a rule has been captured it serves not only as a clear visual description and documentation, but it also becomes an executable expression for doing the following:


Validation of design rule intent

Correlating iDRM rule with imported fabrication/litho failure data

Process engineers can run the rule description they just captured on test layout examples that were used to identify and characterize specific process limitations. The tool will scan these examples, will find all similar patterns to the one that was captured in the design rule description and for each instance will measure all the parameters used in that definition. Based on the logical expression in the rule, the tool will determine a pass or fail result for each instance. You can then compare and correlate the iDRM pass/fail indications with the actual process induced issues, e.g. lithography hotspots, and verify that their iDRM rule description is accurate and completely aligned with the actual physical process related issues. If the description is not exactly aligned, you can quickly modify the statements or values in the rule description. This is done interactively and quickly until an accurate rule description is reached. iDRM has a specific rule correlation feature that provides automatic comparison between its own results and hot-spot (or other violation) markers and also helps in figuring out what needs to be adjusted.

Validation of DRC deck using pass/fail QA structures

DRC deck QA test patterns generated by iDRM

iDRM can automatically generate QA pass/fail test patterns for each captured rule. These QA structures are then used to verify the correctness and completeness of the DRC code in a 3rd party DRC deck. Using the drawn topology and the design rule expression, the tool will toggle pass/fail values for each variable and logical condition and create pattern variations for different sets of values for each variable. Using this feature enables automatic generation of large sets of QA test structure with maximum coverage. Since the test generation and pass/fail tagging is based on the source captured rule definition, it is complete, accurate and consistent.


Data mining, statistics and analysis of physical design

Data mining generating occurrence graphs

Users can run iDRM executables on any existing layout. The tool will scan through the layout and will look for all instances that use a similar pattern to the drawn design rule and take all the relevant measurements of the parameters (variables) that were used in the rule definition. The result is a complete list of all such instances, each with complete information of the relevant measurements, orientations, location, etc.

Data mining can be considered as a superset of a DRC check, as it finds all relevant patterns, measures all of them, and provides full geometrical information on each one. The user can choose to view the results in various forms: tables, various graph formats (e.g. 1d graph, 2d graph, Pareto charts, etc.). The integrated layout viewer provides a one-click hop from each table or graph entry to the layout location where this specific instance is found.

Future extension: DRC check synthesis
iDRM is a design rule compiler: once a design rule has been captured, it already is an executable object that can be run on test data to verify rule intent. In the near future this capability will also be extended to enable synthesis of DRC code for third party commercial DRC programs.


Download iDRM Whitepaper